- OpenVPX Compliant Optical and RF I/O to VPX Backplane
- Jade Architecture with Xilinx Kintex Ultrascale FPGA offers price, power and processing performance advantages
- Navigator Design Suite expedites development and custom IP integration
Pentek introduced the newest member of the Jade™ family of high-performance 3U VPX boards. The Model 54851 is based on the Kintex Ultrascale and features two 500 MHz 12-bit A/Ds with two programmable multiband digital down converters (DDCs) and one digital up converter (DUC) with two 800 MHz 16-bit D/As. The 54851 is the first board utilizing this new 3U VPX architecture with advanced wideband I/O options.
“Recent enhancements to OpenVPX have greatly improved I/O capabilities,” said Robert Sgandurra, director of Product Management. “These enhancements play well into Pentek’s modular approach to product design by offering optical and RF options for high-performance I/O that perfectly match our product capabilities.”
The Model 54851 takes advantage of these VPX I/O options for RF and optical interconnects through the VPX backplane:
• Option -110: Optical connections based on VITA 66.5 (draft), containing blind-mate MT optical connectors with fixed contacts on the plug-in module and floating displacement on the backplane.
• Option -111: RF connections based on ANSI/VITA 67.2, containing multi-position blind-mate analog connectors with SMPM contacts.
• Option -112: RF connections based on ANSI/VITA 67.3 type C, containing multi-position blind mate analog connectors with SMPM contacts, spring-loaded on the backplane allowing more movement and larger diameter cables for better performance.
Future options for higher density optical and RF connectors are planned as the supporting standards become available. Organizations such as The Open Group Sensor Open Systems Architecture (SOSA™) Consortium are specifying additional types and apertures for VITA 67.3.
The Model 54851 can be populated with a range of Kintex UltraScale FPGAs to match specific requirements of the processing task, spanning from the entry-level KU035 (with 1,700 DSP slices) to the high-performance KU115 (with 5,520 DSP slices). The KU115 is ideal for demanding modulation/demodulation, encoding/decoding, encryption/decryption, and channelization of the signals between transmission and reception. For applications not requiring large DSP resources or logic, a lower-cost FPGA can be installed.
The Model 54851 also includes a complete multi-board clock and sync engine and a large DDR4 memory. In addition to supporting PCI Express Gen. 3 as a native interface, the Model 54851 includes optional high-bandwidth connections to the Kintex UltraScale FPGA for custom digital I/O.