MoSys Announces Function Accelerator Platforms Scalable Over Diverse Hardware Environments Expands Business Model to Include New Software Accelerator Product Line
MoSys, Inc. announced a strategic new direction with the introduction of its Software Accelerator Product Line. The new product line includes a family of Function Accelerator Platforms, which target specific application functions and use a MoSys common software interface to allow performance scalability over multiple hardware environments.
This software-defined, hardware-accelerated platform architecture enables system designers to reuse internally developed software code using MoSys’ common software interface across multiple hardware environments depending on the performance required. MoSys’ new application-targeted Function Accelerator Platforms are hardware agnostic and operate with or without a MoSys IC. The platforms can run on a CPU or FPGA that is not attached to a MoSys IC or an FPGA that is attached to a member of the MoSys Accelerator IC family, including the Bandwidth Engine or Programmable HyperSpeed Engine with inmemory compute capability. Using one of these new platforms, MoSys expects that acceleration, scaling from a CPU only to a FPGA attached to a MoSys IC, can be as high as 100 times.
The Company believes that these new MoSys scalable solutions will meet today’s applications needs, as well as provide a path to new products with flexibility to address new, more performance-driven market demands. New hardware system platform designs will need to scale to higher performance, and MoSys expects the Function Accelerator Platforms to increase new application demand for its current Accelerator IC products. As networking and other applications continue to migrate to software-defined environments, most notably software-defined networks (SDN), performance scaling has become key to remaining competitive while addressing the growing requirements being placed on the network.
Software now must be transferrable across multiple hardware environments in order to be both cost-effective and provide the required flexibility to meet changing performance demands. “We anticipate that our new software and IP product licensing strategy will allow us to bring to market products that expand our current business model beyond silicon ICs,” noted Dan Lewis, President and CEO of MoSys. “We believe these new software-focused platforms can contribute to growth in multiple ways. First, they may allow MoSys to expand with higher gross margin products in its currently served available markets by providing higher-value solutions, and, second, of more importance, offer products to previously unaddressed, new markets.” Each Function Accelerator
Platform will be comprised of a MoSys Virtual Accelerator Engine (VAE), which represents a range of software and firmware implementations of the same accelerator function (e.g., search, classification, etc.), employing a common application program interface (API), and, with FPGA versions, a common RTL interface, to allow platform solutions to easily achieve performance scaling. In addition, some function platforms will include support tools to facilitate both software and hardware design. “With these new software-defined, hardware-accelerated solution platforms, MoSys intends to push the boundaries of what a network can achieve,” noted Michael Miller, MoSys’ CTO. “We are developing embeddable function platforms for accelerating search, storage, classification, security, AI and other data-analysis applications that will provide a simple migration path for our customers with a straight-forward performance scalability path.” A key benefit of each VAE lies in the use of a common API.
Once performance requirements are identified, the appropriate hardware platform can be selected. For the system engineer, this means platform portability and the opportunity for a wider range of products in a shorter period of time. Because the workload configuration and management will all be accomplished through a high-level language API, the burden on software application engineers to understand RTL or do firmware coding is minimized.