A new VITA 46.11-aligned WILD™ VPX Chassis Manager (WABGM0) has been introduced by Annapolis Micro Systems. It enables critical chassis control, maintenance, and security functions that were developed in alignment with the SOSA™ Technical Standard, and offers commercial-off-the-shelf (COTS) availability.
“This is a highly-integrated module supporting many functions,” said Jay Grandin, Annapolis Micro Systems VP Product Development. “It provides access to plug-in card (PIC) JTAG and Maintenance ports, CLK1 usage via on-board Zynq FPGA, network functions, and some optional advanced security functions.”
For security, the Chassis Manager implements security signal interfaces and a Xilinx UltraScale+ Zynq ZU5EG MPSoC and latest Microsemi PolarFire FPGA, which can be end-user modified with purchase of the optional Board Support Package (BSP). Other Chassis Manager features include MIL-STD-1553 support and an additional storage flash.
The Chassis Manager plugs directly into a backplane or into a 3U or 6U OpenVPX carrier that plugs into a backplane as a payload card. It fully supports VITA 66/67 by avoiding optical/RF backplane openings.
The Chassis Manager supports the SOSA management interface for all the cards in the chassis, allowing for controlled power-on/off of VPX cards and controlling main 12V power to the chassis. All this is accomplished locally, or remotely via ethernet. The management interface also allows out-of-band monitoring of board health and statistics like board temperature and power.
Another important function this Chassis Manager supports is chassis maintenance. It allows for up to four slots to be accessed in parallel (more with multiplexing) so that a user can access maintenance ports over ethernet without having to open the chassis. It also allows access to JTAG for up to four slots at a time, which allows board maintenance and recovery without having to remove boards from the chassis.
Additionally, the Chassis Manager supports many general-purpose I/O, which can be used for chassis functions or can be converted on the backplane to RS-422 for external communication. It also supports the VPX CLK1 LVDS pin, which can be used for an additional GPIO and goes to the Zynq FPGA.