Pentek, Inc. announced the newest member of its highly popular Jade® family of high-performance XMC FPGA modules. The Jade Model 71891 XMC module is an L-Band RF tuner with two 400 MHz A/Ds based on the high-density Xilinx Kintex UltraScale FPGA. The Model 71891 is designed for connection directly to SATCOM or communications system L-band signals.
“Our customers benefit from this upgrade to the Jade Architecture with increased performance along with 20% lower power and 35% lower cost,” said Bob Sgandurra, director of Product Management for Pentek. “The Navigator Design Suite also provides them with a more robust toolset and extensive library of IP resources,” he added.
RF Tuner Stage
A front panel SSMC connector accepts L-Band signals between 925 MHz and 2175 MHz, typically from an L-Band antenna or an LNB (low noise block). With its programmable LNA, the Maxim MAX2121 tuner directly converts these L-Band signals to IF or baseband using a broadband I/Q analog downconverter followed by 123 MHz low pass anti-aliasing filters. The two analog tuner outputs are digitized by two Texas Instruments ADS5474 400 MHz 14-bit A/D converters to capture the full 123 MHz bandwidth.
For best performance, the analog outputs of the MAX2121 can be used in the IF mode instead of the analog baseband I+Q mode. In this case, each A/D converter digitizes an IF signal and then delivers it to a DDC to produce perfectly balanced complex I+Q digital baseband samples for enhanced demodulation performance. An additional benefit of using the IF analog output mode is that two independent A/D and DDC channels are now available for digitizing and downconverting two signals with different center frequencies and bandwidths.
Factory Installed IP Advances Development
The Model 71891 features two Acquisition IP modules to easily capture and move data. Each module can receive data from either of the two A/Ds or a test signal generator. Each Acquisition IP module contains a powerful DDC IP core with decimation values from 2 to 64k, covering a wide range of signal bandwidths. Because of flexible input routing within the Acquisition IP modules, many different configurations can be achieved including one A/D driving both DDCs or each of the two A/Ds driving its own DDC.
The Jade Architecture
The Pentek Jade Architecture is based on the Xilinx Kintex UltraScale FPGA, which raises digital signal processing (DSP) performance by over 50% over the previous family, with equally impressive reductions in cost, power dissipation, and weight. As the central feature of the Jade Architecture, the FPGA has access to all data and control paths, enabling factory-installed functions including data multiplexing, channel selection, data unpacking, gating, triggering, and memory control.
Navigator Design Suite for Streamlined IP Development
Pentek’s Navigator® Design Suite includes Navigator FDK (FPGA Design Kit) for custom IP and Navigator BSP (Board Support Package) for creating host software applications.
The Navigator FDK includes the board’s entire FPGA design as a block diagram that can be graphically edited in Xilinx’s Vivado tool suite, with full source code and documentation. Developers can integrate their IP along with the factory-installed functions or use the Navigator kit to replace the IP with their own. The Navigator FDK Library is fully AXI-4 compliant, providing a well-defined interface for developing IP or integrating IP from other sources.
Pentek’s Navigator® BSP provides a full suite of high-level C-callable libraries that support all features of the Model 71891 and demonstrate all of its functional modes with examples. The software package is provided with complete source code allowing the user to modify and integrate this functionality into the end application.
Navigator BSP also includes an extremely useful Signal Viewer utility that allows developers to view digitized signals from the output samples of any DDC in the time and frequency domain.