DDC-I announced that its Deos™ DO-178C Design Assurance Level A (DAL A) safety-critical real-time operating system is the first RTOS to receive the Future Airborne Capability Environment™ (FACE) Conformance Certificate for the FACE Technical Standard, Edition 3.1. The certification covers the Safety Extended and Safety Base Profiles for the Operating System Segment (OSS). The Safety Extended Profile, which adds support for TCP/IP communications, multi-process support, and expanded POSIX capability (80 extra functions), is a superset of the functionality required by the Safety Base and Security Profiles.
The Deos RTOS Platform for FACE Technical Standard 3.1 combines the time and space partitioned Deos RTOS and SafeMC™ multi-core technology with RTEMS (Real-Time Executive for Multiprocessor Systems), a mature, deterministic, open systems, hard real-time POSIX executive. The integrated platform combines the strengths and pedigree of both ARINC-653 and POSIX RTOSs, providing the industry-standard interfaces and feature set required for conformance with the FACE Technical Standard, Safety Extended, and Safety Base Operating System Profiles, all in a time and space partitioned, hard real-time, multi-core execution model.
“DDC-I has been a pioneer in providing mission and safety-critical software to the military and aerospace industry for over 35 years,” said Greg Rose, vice president of marketing and product management at DDC-I. “We’re proud to deliver the industry’s first FACE 3.1-Conformant OSS to the avionics community and look forward to supporting FACE standardization efforts with an open, conformant platform that combines best-in-class performance and safety certifiability with enhanced application portability.”
First certified to DO-178 DAL A in 1998, Deos is a safety-critical embedded RTOS that employs patented technology to deliver the highest possible CPU utilization to avionics systems developers. SafeMC technology extends Deos’ advanced capabilities to multiple cores, enabling developers of safety-critical systems to achieve best-in-class multi-core performance without compromising safety-critical task response and guaranteed execution time. SafeMC employs a bound multiprocessing (BMP) extension of the symmetric multiprocessing architecture (SMP), safe scheduling, and cache partitioning to minimize cross-core contention and interference patterns that affect the performance, safety criticality, and certifiability of multi-core systems. These features enable avionics systems developers to address issues that could impact the safety, performance, and integrity of a software airborne system as specified by the Certification Authorities Software Team (CAST) in its Position Paper CAST-32A for Multi-core Processors.