Most of today’s RF communication systems demand software tools that are capable of delivering repeatable performance. Software tools that are designed to give consistent output when the same input is provided are said to be deterministic and exhibit the same behavior every time they are executed. For software defined radio (SDR) systems, determinism is required to ensure that the behavior of a radio system is predictable and consistent. Variations in environment parameters make RF communication systems exhibit non-deterministic characteristics.
In this article, we will explore how complex RF communication systems can be realized by combining SDR platforms and software solutions. Next we will focus on how the architecture of field programmable gate arrays (FPGAs) yields minimal and deterministic latency. We will also discuss how utilizing common software API such as UHD helps to enhance determinism and code portability across multiple SDR systems.
This article will also explore how GNU Radio can be used to implement complex SDR systems with deterministic performance. We will also discuss one software tool that allows adjustment of parameters to optimize determinism of a radio communication system. Lastly, this article will focus on a few applications that demand deterministic performance and how SDR systems are used in their implementation.
Deterministic performance of SDRs
A typical SDR platform features a radio front-end (RFE) that handles analog signals and a digital back-end that processes digitized signals. The RFE performs transmit (Tx) and receive (Rx) functions and is designed to operate over a broad frequency range. The highest bandwidth SDR platforms offer multiple independent channels and a high instantaneous bandwidth, up to 3GHz. High end SDR systems feature an FPGA with a broad range of onboard digital signal processing capabilities including upconverting, downconverting, demodulation, decimation, interpolation, and data packetization.
SDR systems use software for a wide range of digital signal processing functions including modulation, demodulation, upconverting and downconverting. These platforms also utilize software for various RFE control operations such as gain setting, sampling rate setting and tuning. SDR platforms also utilize software to interface with various networks that they communicate with. Highest throughput SDRs are capable of sending and receiving data at high speeds over high speed links. Some of the software tools that are commonly used with SDR systems include Hardware Description Languages (HDLs), Universal Hardware Driver (UHD) and GNU Radio. To start with, UHD is an open source driver used for developing custom software tools for controlling and configuring SDR solutions.
Software tools that enhance determinism in SDR solutions
GNU Radio is an open source toolkit for developing complex digital signal processing (DSP) in SDR systems. Hardware description language (HDL) such as VHDL or Verilog are used for developing custom, ultra-fast and deterministic DSP functions on FPGAs. FPGA designs are analyzed and synthesized using software tools such as Intel Quartus. SDR systems utilize FPGA for packetizing data for transmission over Ethernet or any other network stack. This requires VITA Radio Transport (VRT) standard which is a protocol that defines the format for transmitting and receiving digitized signals between radio systems.
On the application programming interface (API) side, UHD is used to allow development of deterministic software and transmit/receive commands. Deterministic software tools, waveforms and commands can be ported from one SDR device to another without variations in performance. Deterministic waveforms and pulses can be transmitted at predictable time intervals and for specific durations.
Deterministic performance also allows execution of various commands such as center frequency, sampling rate, filtering method, broadcasting channels, type of broadcast waveform, and so on. Determinism also aids in controlling parameters in transmit and receive functions such as the number of samples sent to the buffer and the size of the buffer.
How FPGAs enhance determinism in SDR solutions
FPGAs, unlike CPUs and ASICs, have highly parallel computing architectures that ensure low and deterministic latency. They are capable of performing a wide range of DSP operations on digitized signals. In most RF systems, applications running on host processors offload compute-intensive tasks to FPGAs for faster computation.
The computation and storage requirements of a signal processing task increase with an increase in the sampling rate. With an SDR system, captured data can be manipulated through decimation and interpolation techniques thereby helping to create more space on a storage device while preserving fidelity.
Assessing and configuring RF systems using software
GNU Radio offers a broad array of tools for controlling and visualizing the signal performance of an RF system. With this software suite, you can visualize the signal in various ways to ensure that you are transmitting or receiving the correct signal. Moreover, GNU Radio allows you to perform a wide range of operations such as pulse shaping and developing modulation and demodulation schemes. By utilizing constellation diagrams, you can assess signals to ensure that modulation scheme errors are minimal and deterministic.
An eye pattern/diagram is a popular tool for assessing the signal performance of a RF system. This time domain visualization is generated by applying repetitively sampled digital data from a receiver to the vertical input and triggering the horizontal sweep using the data rate. The eye diagram is used for assessing various performance measures including inter-symbol interference, length of a signal, synchronization of a signal, presence of undershoots and overshoots and noise level. Figure 1 shows an eye diagram generated using GNU radio.
Some high performance SDR platforms such as Per Vices Cyan feature a Web user interface (UI) for configuring radio systems to ensure deterministic performance. This UI allows configuration of transmit chain, receive chain and clock board. In the receiver chain, this Web UI allows you to configure a wide range of parameters including synthesizer frequency, RFE receiver gain and attenuation. For the receiver DSP chain, it allows you to set various parameters including sampling rate, destination IP links and DSP NCO offset.
The Tx Web UI allows you to configure the entire transmit chain from the radio front end to the digital back end. Some of the RF parameters that it allows you to configure in the radio section include IQ Voltage Bias, DAC NCO offset, synthesizer frequency, dither and gain. For the Tx DSP chain, this Web UI allows you to set DSP NCO offset, IP/MAC address links, UDP port, and sampling rate.
Applications that demand deterministic performance
Multiple input multiple output (MIMO) phased arrays are commonly used in modern networks that demand high performance and reliability. Using MIMO phased arrays helps to minimize interference and scattering and maximize data transmission rates. The deterministic latency of the FPGAs used in the implementation of MIMO systems help to enhance their overall performance. This deterministic performance also helps to enhance phase coherency in MIMO systems. The architecture of FPGAs also makes it easier to calculate phase coherency adjustments in applications such as radar.
By utilizing GNU Radio, you can do visual phase alignment of inputs from different devices that form your MIMO system. All you need to do is select the synchronization settings of your devices using the UHD API and observe the outputs to know if the phases and frequencies are synchronized or not. Furthermore, you can set the timing source of your MIMO system by employing a UHD-based software program. Figure 2 shows a flow graph and an output graph for two channels that are not in phase. Adding a phase correction ensures that the two channels are aligned.
High frequency trading (HFT) systems have strict latency requirements and demand networks with deterministic latency performance. The FPGAs used in SDRs have low latency making these radios ideal for developing modem cores for use in trading applications. In addition, the deterministic nature and highly parallel architecture of FPGAs make them an ideal solution for combating round trip latencies in trading systems. In HFT systems, FPGAs are used for executing compute-intensive portions of trading algorithms along with the modulation and demodulation of the data.
Modern wireless and cellular networks such as 5G, machine-to-machine (M2M) and Internet of Things (IoT) networks are time sensitive and demand components with minimal and deterministic latency. In the case of M2M networks, low latency and deterministic performance are required to ensure that message delivery times meet stringent timing constraints. Without deterministic performance, some features of M2M networks such as open loop automation control can be significantly affected. In addition, the reconfigurability of the FPGAs used in SDR platforms allows new wireless communication protocols and DSP algorithms to be implemented with ease.
Deterministic software tools exhibit a consistent performance and give the same results when provided with the same input. SDRs use software for a wide range of control and signal processing functions. Complex communication architectures can be realized by combining SDRs and software tools such as UHD and GNU Radio. In this article we have learned why software determinism is critical and how complex SDR solutions can be implemented by combining SDR and software. We have also learned some of the applications that demand deterministic performance.
Per Vices specializes in the design, development and building of high performance SDR platforms that are suitable for a wide range of applications including low latency links, 5G networks and MIMO radars.
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