Avery Design Systems announced that its fully-tested Verification IP (VIP) for 800Gbps Ethernet can now be used to perform virtual network co-simulation for the full layer Ethernet 2-7 network stack. The combination of the VIP and a virtual co-simulation/co-emulation system enables the running of full hardware/software system verification on pre-silicon SoC RTL and software integrations. System designers can now perform system-level validation of an SoC design’s Ethernet and TCP/IP network interfaces using real network traffic workloads of communication, data center, and storage network protocols running on either host OS or virtual machine (guest OS) platforms.
The virtual network co-simulation solution is the latest extension of Avery’s virtual platform co-simulation/co-emulation strategy for next-generation pre-silicon validation of interfaces in system-level environments. With its approach, virtual platform co-simulation virtualizes host or embedded devices such as PCIe, CXL, AMBA, and now Ethernet interfaces, so verification can be performed under actual operational conditions, including verification of software integration.
This comes on the heels of other news from Avery Design Systems including support for CXL 3.0 and that its NVMe, PCIe, and AXI VIP have been adopted by TenaFe for new solid-state storage controllers.