MoSys Partners with Silicom to Provide Stellar Packet Classification IP Optimized for Intel FPGA-Based SmartNICs and Infrastructure Processing Units

Supports 400Gbps Line Rate for 5G Wireless, 5G Packet Core, Broadband Network Gateways, Network Firewalls, Anti-DDoS, and Data Center Routing

MoSys, Inc. is focused on Accelerating Data Intelligence and provides both semiconductor and IP solutions to enable fast, intelligent data access for Cloud, networking, security, communications, and 5G systems. Today, MoSys announced that it has partnered with Silicom Connectivity Solutions to optimize MoSys’s Stellar Packet Classification IP for Silicom’s latest generation of Intel FPGA-based SmartNICs and Infrastructure Processing Units (IPUs). The combination of MoSys IP and Silicom’s SmartNICs and IPUs (also sometimes referred to as Data Processing Units – DPUs) can increase the performance of servers and switches that are deployed in virtualized Cloud datacenters, 5G Wireless networks, especially 5G User Plane Function (UPF), Broadband Network Gateways, Network Firewalls, Anti-DDoS, and Data Center Routing solutions.

Silicom FPGA IPUs and SmartNICs are an ideal platform for the MoSys Stellar Packet Classification IP, which is optimized for High Flexibility/High Complexity Security (ACL) and Routing (LPM). The onboard Intel Stratix 10 FPGA of the Silicom SmartNIC N5010 hosts the MoSys hardware-accelerated algorithmic TCAM-like solution to help ensure that 100 to 400Gbps networks can keep up with 100s of millions of decisions per second that they have to process, even with databases of up to a million complex 10 tuple, 480 bit ACL security rules or 4 million LPM IPV4 and IPV6 routing rules.

“We are pleased to partner with Silicom to support their latest Intel-based FPGA IPU/SmartNIC solutions with our accelerated MoSys Stellar Packet Classification IP to improve the wireless and broadband customer experience,” said Daniel Lewis, MoSys CEO. “When paired with the latest Intel® Stratix® 10 FPGAs, MoSys IP can provide significant acceleration for key network security and routing functions.”

“MoSys Stellar Packet Classification IP offers advanced capabilities that will help our IPU/SmartNIC customers accelerate a whole range of innovative data center, 5G and broadband networks and access edge solutions,” said Oren Benisty, Silicom’s EVP Strategic Sales. “We are pleased to be using MoSys IP, which has been optimized for our Intel FPGA Programmable Ethernet Cards.”

MoSys’s Stellar Packet Classification IP targets:

  • Routing – supports Longest Prefix Match (LPM) Ipv4/Ipv6 routing, including support for P4 and virtual routes for Cloud Data Centers, 5G User Plane Functions (UPF), P4 based systems, Network Classification, Carrier-Grade NAT, Broadband Network Gateways (BNG), NFVi, Flow Steering, L3 Forwarding and Filtering, vRouter, Open vSwitch Offload, and Cloud Gateways.
  • Security, Load Balancing and Traffic Analysis – supports very complex, 10+ tuple Access Control List (ACL) type lookups for Network Firewalls, Allow/Deny Lists, P4-based systems, Network Detection and Response (NDR), Anomaly Detection, Lawful Intercept, Anti-DDoS, L4 Load Balancing, Application Delivery Controllers (ADC), Application and Network Analysis, Network Telemetry, Test and Measurement, Network Packet Brokers, and other markets and use cases.

The Silicom FPGA SmartNIC N5010 series features a high-performance Intel Stratix 10 DX2100 FPGA with 8GB of HBM2, as well as DDR4 memories and quad QSFP28. MoSys IP utilizes the high-performance HBM2 memory to support millions of ACL and LPM rules.

The Silicom FPGA IPU NIC C5010X series features dual SFP28 and a high-performance Intel Stratix 10 DX1100 FPGA and on-board Xeon D CPU. This unique combination of FPGA and Xeon on one PCIe card enables general-purpose processing in addition to MoSys IP running on the FPGA. The presence of the CPU allows elaborate onboard control path processing in conjunction with in-depth search and lookup functions in the FPGA.

Leave a Reply

Your email address will not be published. Required fields are marked *