EKF Elektronik launched two new 3U Compact PCI processor boards with 11th-generation Intel Core and Xeon processors (Tiger Lake H45). The boards will be available in two variants: the first is a CompactPCI Serial design, and the second supports CompactPCI Classic and CompactPCI PlusIO. The latter supports the classic parallel PCI bus, for which numerous COTS and proprietary expansion cards are still available today. This enables developers of CompactPCI-based systems to implement any CompactPCI system design and secure their investment in this PICMG standard, launched in 1999, long into the future. The new boards will be available until at least 2032 – just like the existing CompactPCI CPU boards with 7th generation Intel Xeon E3 v6 processors (codename Kaby Lake), which the company also offers for all three CompactPCI sub-specifications.
Long-term security for existing investments
“Support for the PCI bus is essential for older CompactPCI system designs, yet some vendors are withdrawing from this market. The announcement that EKF Elektronik will continue to support the PCI bus for new CompactPCI designs, therefore, sends an important message to many users: They can safeguard their investment in this legacy technology for many more years, continue to upgrade their system designs with the latest processor technology, and reap all the benefits that come with it,” explains Manuel Murer, Business Development Manager at EKF Elektronik.
As 11th Gen Intel Core and Xeon processors no longer support PCI natively, EKF Elektronik has installed a software-transparent PCIe-to-PCI bridge on the processor boards with CompactPCI Classic and CompactPCI PlusIO support. This allows developers to port existing applications to the new boards seamlessly. Advantages of such upgrades include higher energy efficiency, higher processor-integrated security, computing power, up-to-date software support, and support for artificial intelligence and the latest graphics features to provide the best possible user experience.
New J2 for PlusIO
CompactPCI PlusIO users will find a new J2 connector on the new CompactPCI PlusIO (PICMG 2.30) boards, which is footprint-compatible with the CompactPCI Classic (PICMG 2.0) specification. This change was necessary because the J2 connector developed for PlusIO was discontinued. But there is no need to redesign the backplane. The only restriction is that high-speed backplane transfer is limited to 2.5 GT/s for PCIe Gen 1 and 1.5 Gbit/s for SATA. Depending on the application and system, it is possible to use the total bandwidth. The CompactPCI‘s PCI bus can be used in the usual bandwidth of up to 133Mbyte/s.