Rapid Silicon, a provider of A.I. and intelligent edge-focused FPGAs based on open-source technology, announced its Vega eFPGA I.P today. The Vega eFPGA I.P. is an embeddable standalone FPGA IP core, which is flexible, powerful, and efficient to enable a programmable solution to your SoC. Its customizable and scalable architecture allows the design of custom eFPGA I.P. from 1.5K to 100K+ Logic Cells, configurable BRAM, and DSP MAC tiles. The eFPGA I.P. also comes with I.O. tiles covering all sides of the I.P. for easy SoC integration. The Vega IP also includes an FPGA configuration block for easy eFPGA configuration and can be configured with different combinations of CLB, BRAM, and DSP tiles.
" We are thrilled to launch our Vega eFPGA I.P.," said Naveed Sherwani, CEO of Rapid Silicon. Customers can tailor the Vega IP to meet their needs with its highly configurable architecture. The Raptor Design Suite makes it easy for customers to integrate the I.P. into their SoCs, reducing time-to-market and development costs. We are excited to see the innovative solutions our customers will create with the Vega eFPGA I.P.
The Vega eFPGA I.P. is built based on foundry-specific standard cells, which makes it easier to port to different foundry and technology nodes. It is easy to embed into an SoC and comes with configurable input/output, clocking, and test/DFT pins. Vega IP has soft FPGA configuration logic and can be integrated with SoC using JTAG or APB interface. Vega IP has an internal power grid that can be connected to the customer’s digital SoC power grid. It is highly configurable and can be ported easily to other technology nodes.
The Vega eFPGA I.P. license comes with Raptor Design Suite – the industry's first and only commercially available open-source toolchain for FPGA. It has a complete FPGA design tool chain, including Simulation, Synthesis, Placement, Routing, Bitstream Generation Configuration. Raptor has integrated LiteX and Migen IP management integration for easier I.P.
Integration – Our design suite includes Rapid Power Estimator for I.P. power estimation and a RapidGPT plug-in for VSCode for FPGA design productivity improvements.